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Terminated in academic year 2020/2021

Computer Architecture and Parallel Systems

Type of study Bachelor
Language of instruction English
Code 460-2034/02
Abbreviation APPS
Course title Computer Architecture and Parallel Systems
Credits 6
Coordinating department Department of Computer Science
Course coordinator Ing. Petr Olivka, Ph.D.

Subject syllabus

1. Production technology of digital circuits. Computer architectures according to the von Neumann and Harvard, the essential characteristics and operating principles.
2. Machine instructions, addressing, address space. Computer performance measurements.
3. Principles of communication with peripherals, I/O gates, program controlling, interrupts, priorities solving.
4. CISC and RISC processors, basic features and incentives for the creation, concatenation, prediction jumps, hazards, basic RISC representatives.
5. Intel, developmental series, the basic features and internal architecture.
6. Processors from other companies, their properties and applications. Signal processors.
7. Monolithic computers, requirements for the construction, properties and usage, typical integrated peripherals. Microchip and Atmel microcontrolers.
8. Memory organization in computers, memory hierarchy. Internal memory, static, dynamic, virtual memory organization. External memory - magnetic, optical, magneto-optical. IDE PATA / SATA.
9. Bus, division of the addresses to signals, data and control. Bus cycle. Basic features of PCI, AGP and PCI Express technology. USB.
10. Video adapter and display units. Principles of displays unit and image creation.
11. Modern trends in computer architecture. Parallel systems and computer architecture .
12. Advanced GPU architecture – CUDA. GPU computing history.
13. GPU parallel architecture.
14. Super computing and clusters. High Performance Computing.

Labs:
1. Safety training, development Kit introduction, programming IDE, simple application.
2. Pulse wide modulation, LED control, simple animation.
3. Pulse wide modulation, LED control, RGB color composition, animation with button use.
4. LCD display control, color composition, use of fixed size font.
5. LCD control, displaying graphical and text information, simple application with buttons control.
6. I2C bus, expander and LED control.
7. I2C bus, FM radio module control. display RDS information.
8. Revision of micro-controller programming.
9. Multi thread application, algorithm design for multiple thread.
10. Programming of basic algorithm with multiple thread, comparison of sequential and parallel implementation.
11. Technology CUDA, base program concept, simple application with vectors and matrices.
12. Technology CUDA, digital image processing, simple image transformation programming.
13. Technology UCDA, simple graphical animations.
14. Revision of parallel programming.

Project:
The project is individual work of students between laboratory assignments.

Literature

[1] Olivka, P.: Computer Architecture and Paralles Systems, http://poli.cs.vsb.cz/edu/apps/eng
[2] Olivka, P.: Assembly Language Programming, http://poli.cs.vsb.cz/edu/soj
[3] Olivka, P., Seidl, D.: Syllabus for laboratory exercises, http://poli.cs.vsb.cz/edu/apps
[4] Patterson, D.: The Top 10 Innovations in the New NVIDIA Fermi Architecture, and the Top 3 Next Challenges. 2009.

Advised literature

[1] Hennessy J. L, Patterson D. A., Computer Architecture, 4th ed., A Quantitative Approach, Morgan Kaufmann, 2006, ISBN 978-0-12-370490-0 
[2] Hennessy J. L, Patterson D. A., Computer Architecture, 5th ed., A Quantitative Approach, Morgan Kaufmann, 2011, ISBN 978-0123838728 
[3] David Patterson, John Hennessy, Computer Organization and Design, 4th ed., Morgan Kaufmann, 2011, ISBN 9780080886138 
[4] David Patterson, John Hennessy, Computer Organization and Design MIPS Edition, 5th ed., Morgan Kaufmann, 2013, ISBN 978-0124077263