Lectures:
1. Programmable Logic Devices PAL, GAL. Comparison between HW and SW design of logic functions.
2. FPGA Xilinx architecture . Configurable Logic Blocks CLB, IOB, interconnect network.
3. FPGA and CPLD design tools. Introduction to Xilinx ISE development tool, schematic design, VHDL Language.
4. Basic Logic functions design - Logic Gates, Multiplexor, Decoder, Adder, Multiplexor.
5. Basic Sequential logic functions design - D-Flip Flop, Data Register, Shift Register, Counters.
6. Hierarchical Logic Design for FPGA.
7. State diagram as a tool for sequential logic function design. State editor. Applications in Embedded Control Systems.
8. Implementation of memories in FPGA. Block and Distributed RAM.
9. DSP Blocks in FPGA. Utilization in Medical Systems.
10. Design and utilization of IP Macros. Core Generator, EDK.
11. Specific features of FPGA architectures . DCM, HW multipliers...
12. Logic hazards and their elimination. Synchronous and asynchronous logic design.
13. Additional devices for logical system building with FPGA. Power supply and interconnecting devices.
Laboratories:
- Introduction of the content of excercises and credit requirements. Combinational and sequential logic functions .
- State machine example - security system, design and simulation.
- Synchronous logic design, clock signals, buffer GBUF.Hierarchical design, combined design. Treating LUT as memory, dual-ported memory, memory content definition.
- Test no.1: Programmable logic devices - basic terms, use, FPGA architecture . - Continuing on autonomous working. Design entry and simulation in VHDL.
- Continuing on autonomous working. Design implementation and tuning on development board.
- Seminar: Presentation of the individual projects.
Computer labs:
- Introduction with FPGA design tools.
- Xilinx ISE development software: Project navigator, editor VHDL.
- Continuing on the autonomous working.
- Xilinx ISE: Hierarchical design structure , logic buses, logic simulator, design implementation.
- Xilinx ISE: A serial interface implementation in FPGA.
- Logic function design based on state diagram. Functional evaluation in VHDL.
1. Programmable Logic Devices PAL, GAL. Comparison between HW and SW design of logic functions.
2. FPGA Xilinx architecture . Configurable Logic Blocks CLB, IOB, interconnect network.
3. FPGA and CPLD design tools. Introduction to Xilinx ISE development tool, schematic design, VHDL Language.
4. Basic Logic functions design - Logic Gates, Multiplexor, Decoder, Adder, Multiplexor.
5. Basic Sequential logic functions design - D-Flip Flop, Data Register, Shift Register, Counters.
6. Hierarchical Logic Design for FPGA.
7. State diagram as a tool for sequential logic function design. State editor. Applications in Embedded Control Systems.
8. Implementation of memories in FPGA. Block and Distributed RAM.
9. DSP Blocks in FPGA. Utilization in Medical Systems.
10. Design and utilization of IP Macros. Core Generator, EDK.
11. Specific features of FPGA architectures . DCM, HW multipliers...
12. Logic hazards and their elimination. Synchronous and asynchronous logic design.
13. Additional devices for logical system building with FPGA. Power supply and interconnecting devices.
Laboratories:
- Introduction of the content of excercises and credit requirements. Combinational and sequential logic functions .
- State machine example - security system, design and simulation.
- Synchronous logic design, clock signals, buffer GBUF.
- Test no.1: Programmable logic devices - basic terms, use, FPGA architecture . - Continuing on autonomous working. Design entry and simulation in VHDL.
- Continuing on autonomous working. Design implementation and tuning on development board.
- Seminar: Presentation of the individual projects.
Computer labs:
- Introduction with FPGA design tools.
- Xilinx ISE development software: Project navigator, editor VHDL.
- Continuing on the autonomous working.
- Xilinx ISE: Hierarchical design structure , logic buses, logic simulator, design implementation.
- Xilinx ISE: A serial interface implementation in FPGA.
- Logic function design based on state diagram. Functional evaluation in VHDL.