Programmable Logic Devices

Programmable Logic Devices
450-4029/01
čeština Programmable Logic Devices
450-4029/02
angličtina Programmable Logic Devices
450-4029/03
čeština Programmable Logic Devices
450-4029/04
angličtina

Summary

The study covers the programmable logic devices design technique, especially of FPGA and CPLD types. An internal architecture is explained in some typical exaples. The design entry techniques include schematic designs, state diagrams and VHDL language. Some specific points of view are discussed: synchronous design, incremental design, hierarchical design, and more. Excercises are aimed to familiarize students with design entry, simulation and implementation tools. The students can verify their results on development boards in lab.

Literature

Maxfield, C: The Design Warrior's Guide to FPGAs. Elsevier, 2004.
The Programmable Logic Databook , Xilinx Inc., 1999.
Parnell, K. – Mehta, N.: Programmable Logic Design Quick Start Handbook. 4th ed. [s.l.]: Xilinx Inc., 2003. 225 s.
Ashenden, P.J. The Designer's Guide to VHDL. San Francisco(USA): Morgan Kaufmann Publishers, 1999. 688 s. .

Advised literature

Berge, J.: VHDL Designer's Reference. Dordrecht, Kluwer Academic, 1992.
Mirkowski, J. - Kapustka,M. - Skowroński, Z. - Biniszkiewicz, A.: EVITA Interactive VHDL Tutorial REV.2.1. Henderson, ALDEC, Inc., 1998.
Kilts, S.: Advanced FPGA Design. John Wiley and Sons Ltd, 2007. ISBN: 9780470054376.

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Language of instruction	čeština, angličtina, čeština, angličtina
Code	450-4029
Abbreviation	PHP
Course title	Programmable Logic Devices
Coordinating department	Department of Cybernetics and Biomedical Engineering
Course coordinator	Ing. Vladimír Kašík, Ph.D.