Lectures:
Materials for ICs. Crystal growth. Zonal rafination.
Epitax growth.
Oxidation, difussion.
Iont implantation.
Photolitography.
Plasma etching. Phyzical deposition of metalic lays.
Lays etching.
Contamination of boards, cleaning.
Monolithic rezistors, capacitors.
Technology COSMOS.
Rule for design in bipolar struktures.
Example of tranzistoru NPN design. Test struktures.
Realization of tranzistor N MOS.
Metodology of design ICs, CAD devices (Cadence, Spice, Verilog). Modeling.
Exercises:
Difusion - matematical model, pressure and temperature dependence, calculation of depth of lay.
Laboratories:
Organization of laboratory exercises at firm ON-Semiconductor, Rožnov pod Radhoštěm.
Properties of lays oxid and nitrid Silicium, created by LPCVD and PECVD technology .
Charakterization Si epitax lay with using CV plotter with probe SSM 495.
Analyzis of rest atmosfera in sputtering agregat LLS801.
Measuring parameters AL alloys on test Si boards.
Microhardness measuring of sputtered lay.
Measuring of etch speed PECVD nitrid-rezist on test Si boards.
Measuring of reproducebility etch speed in agregat TEGAL901e.
Comparisn strip speeds of rezist on barelovém a singledesk agregat.
Modeling of concentration profil and lay-rezistance of lays created by difusion and iont implantation.
Measuring of specific parameters - test structures on Si board.
Modeling of function bipolar tranzistor using simulator.
Method CV(Standard Capacitance-Voltage).
Influence of expozition and thick of lay.
Projects:
Project No.1 Complete description of bipolar technology.
Project No.2 Complete description of unipolar technology.
Materials for ICs. Crystal growth. Zonal rafination.
Epitax growth.
Oxidation, difussion.
Iont implantation.
Photolitography.
Plasma etching. Phyzical deposition of metalic lays.
Lays etching.
Contamination of boards, cleaning.
Monolithic rezistors, capacitors.
Technology COSMOS.
Rule for design in bipolar struktures.
Example of tranzistoru NPN design. Test struktures.
Realization of tranzistor N MOS.
Metodology of design ICs, CAD devices (Cadence, Spice, Verilog). Modeling.
Exercises:
Difusion - matematical model, pressure and temperature dependence, calculation of depth of lay.
Laboratories:
Organization of laboratory exercises at firm ON-Semiconductor, Rožnov pod Radhoštěm.
Properties of lays oxid and nitrid Silicium, created by LPCVD and PECVD technology .
Charakterization Si epitax lay with using CV plotter with probe SSM 495.
Analyzis of rest atmosfera in sputtering agregat LLS801.
Measuring parameters AL alloys on test Si boards.
Microhardness measuring of sputtered lay.
Measuring of etch speed PECVD nitrid-rezist on test Si boards.
Measuring of reproducebility etch speed in agregat TEGAL901e.
Comparisn strip speeds of rezist on barelovém a singledesk agregat.
Modeling of concentration profil and lay-rezistance of lays created by difusion and iont implantation.
Measuring of specific parameters - test structures on Si board.
Modeling of function bipolar tranzistor using simulator.
Method CV(Standard Capacitance-Voltage).
Influence of expozition and thick of lay.
Projects:
Project No.1 Complete description of bipolar technology.
Project No.2 Complete description of unipolar technology.