The system design for control is conditioned by asking of analogue signal processing. The external tester gives only part of results in the high scale integration. The Boundary-Scan Test method application (B-ST) requires the application interconnection: TAP, interface control unit of TAP, register of built-in test structure B-ST. Languages for test designs are used for support of testing. This support runs on the GALILEO at the workstations HP712. The support architecture B-ST of programmable application specific circuits is used for PLD and FPGA.