M. Líška, V. Šulo, J. Strelec; Programovatelná logická pole; edice GRADA.
V. Musil a kol.; Návrh integrovaných obvodů; skripta FEI VUT Brno.
Firemní literatůra firmy TEXAS INSTRUMENT; "Applications Handbook FPGA".
Firemní literatura firmy TEXAS INSTRUMENT; "Data manual FPGA".
Firemní literatura firmy ALTERA; Data Book.
Firemní literatura firmy ALTERA; The Maximalist Handbook.
Firemní literatura firmy NATIONAL SEMICONDUTOR; Programmable Logic. Devices Databook and Design Guide.
Firemní literatura firmy DATA I/O; easyABEL-Design Software-User Manual.
Firemní literatura firmy DATA I/O; SmartPart-Intelligent Device Selection-User Manual.
Firemní literatura firmy Xilinix
Firemní literatura firmy Philips
Programmable Logical Devices
| Language of instruction | čeština |
|---|---|
| Code | 454-0053 |
| Abbreviation | PLP |
| Course title | Programmable Logical Devices |
| Coordinating department | Department of Telecommunications |
| Course coordinator | doc. Ing. Jaroslav Zdrálek, Ph.D. |
Summary
Fundamental programmable logical element architectures - AND/OR matrixes, TINGLE, GAL, programmable cells FPGA, CPLD. programming manners and testing - ISP and BST. data form for programming - JEDEC form. Practical suggestions from combinational logical circuits, sequential logical circuit up to their realization in programmable logical elements. part-user circuit fundamental architectures.
Literature
Advised literature
No advised literature has been specified for this subject.